10 11 |
PHASE1
UGATE1 |
Run these two traces in parallel fashion with sufficient width. Avoid any sensitive analog signal traces from crossing over or getting close. Route the PHASE1 trace to the high-side MOSFET source pin instead of general copper.
Place the IC close to the gate terminals of the switching MOSFETs and keep the gate drive signal traces short for a clean MOSFET drive. The IC can be placed on the opposite side of the switching MOSFETs.
Place the input capacitors as close as possible to the switching high-side MOSFET drain and the low-side MOSFET source, and use shortest PCB trace connection. Place these capacitors on the same PCB layer with the MOSFETs instead of on different layers and using vias to make the connection.
Place the inductor terminal to the switching high-side MOSFET source and low-side MOSFET drain terminal as close as possible. Minimize this phase node area to lower the electrical and magnetic field radiation but make this phase node area big enough to carry the current. Place the inductor and the switching MOSFETs on the same layer of the PCB. |
| 12 |
BOOT1 |
Switching pin. Place the bootstrap capacitor in the general proximity of the controller. Use sufficient wide trace. Avoid any sensitive analog signal traces from crossing over or getting close. |
| 13 |
ASGATE |
Run this trace with sufficient width in parallel fashion with the ADP pin trace. |
14 15 |
CSIN
CSIP |
Run two dedicated traces with sufficient width in parallel (close to each other to minimize the loop area) from the two terminals of the adapter current sensing resistor to the IC. Place the Differential mode and common-mode RC filter components in the general proximity of the controller.
Route the current sensing traces through vias to connect the center of the pads or route the traces into the pads from the inside of the current sensing resistor. The following drawings show the two preferred ways of routing current sensing traces.
 |
| 16 |
ADP |
Run this trace with sufficient width in parallel fashion with the ASGATE pin trace. |
| 17 |
DCIN |
Place the OR diodes and the RC filter in the general proximity of the controller. Run the VADP trace and VSYS trace to the OR diodes with sufficient width. |
| 18 |
VDD |
Place the RC filter connecting with the VDDP pin in the general proximity of the controller. Run the trace connecting to the VDDP pin with sufficient width. |
| 19 |
ACIN |
Place the voltage divider resistors and the optional decoupling capacitor in the general proximity of the controller. |
| 20 |
OTGEN/CMIN |
No special consideration. |
21 22 |
SDA
SCL |
Digital pins. No special consideration. Run the SDA and SCL traces in parallel. |
23 24 |
PROCHOT#
ACOK |
Digital pin, open-drain output. No special consideration. |
| 25 |
BATGONE |
Digital pin. Place the 100kΩ resistor series in the BATGONE signal trace and the optional decoupling capacitor in the general proximity of the controller. |