markdowned-datasheets/REN_RAA489118/TOC.md

RAA489118 Datasheet — Table of Contents

Markdown transcription of REN_RAA489118_DST_20251028.pdf (Renesas RAA489118 Buck-Boost Battery Charger with SMBus Interface for General 30V and USB PD EPR), Rev.2.00, Oct 28 2025, document R16DS0321EU0200.

The datasheet was split into the per-chapter PDFs in this folder; each has a matching .md transcription and, where the chapter contains figures, a folder of extracted PNGs. Page numbers below are the printed datasheet pages, and are mirrored in the transcriptions as <!-- page N --> markers.

Not transcribed: the printed Contents pages (source pages 2–3), which this file replaces, and the closing Important Notice and Disclaimer (source pages 73–74).

Chapters

#	Chapter	Pages	Source PDF	Figures
—	Features and Applications	1	pdf	1
1	Overview	4–6	pdf	3
2	Pin Information	7–9	pdf	1
3	Specifications	10–20	pdf	1
4	Typical Performance Graphs	21–25	pdf	26
5	General SMBus Architecture	26–28	pdf	5
6	Registers	29–43	pdf	—
7	Modulator Information	44–51	pdf	8
8	Application Information	52–60	pdf	2
9	General Application Information	61–64	pdf	2
10	Layout	65–67	pdf	2
11–13	Package, Ordering, Revision History	68	pdf	—
A	ECAD Design Information	69–72	pdf	2

Sections

• RAA489118
  • Features
  • Applications
• 1. Overview
  • 1.1 Typical Application Diagram
  • 1.2 Block Diagram
• 2. Pin Information
  • 2.1 Pin Assignments
  • 2.2 Pin Descriptions
• 3. Specifications
  • 3.1 Absolute Maximum Ratings
  • 3.2 Recommended Operating Conditions
  • 3.3 Thermal Specifications
  • 3.4 Electrical Specifications
  • 3.5 SMBus Timing Specification
  • 3.6 Gate Driver Timing Diagrams
• 4. Typical Performance Graphs
  • 4.1 Battery Charging Only (No BFET)
  • 4.2 NVDC Charging (with BFET)
• 5. General SMBus Architecture
  • 5.1 Data Validity
  • 5.2 START and STOP Conditions
  • 5.3 Acknowledge
  • 5.4 SMBus Transactions
  • 5.5 Byte Format
  • 5.6 SMBus and I2C Compatibility
  • 5.7 SMBus Commands
• 6. Registers
  • 6.1 Register Summary
  • 6.2 DAC Register Summary
  • 6.3 Control Registers
  • 6.4 Information Registers
• 7. Modulator Information
  • 7.1 RAA489118 Buck-Boost Charger Modes of Operation
  • 7.2 USB On-the-Go (USB OTG)
  • 7.3 Pass-Through Mode
  • 7.4 Modulator Control Loops
    • 7.4.1 Adapter Current Loop and Two-Level Current Limit
    • 7.4.2 USB-PD On-the-Go Output Current
    • 7.4.3 Input Voltage Regulation Loop
      • 7.4.3.1 Adapter Minimum Voltage
      • 7.4.3.2 USB-PD On-the-Go Minimum Battery Voltage
    • 7.4.4 USB-PD On-the-Go Output Voltage
    • 7.4.5 System Voltage Regulation and Trickle Charging
    • 7.4.6 Charging Current Loop
      • 7.4.6.1 Reverse Mode Discharge Current
    • 7.4.7 Turbo Mode Support
  • 7.5 R3 Modulator
• 8. Application Information
  • 8.1 Soft-Start
  • 8.2 Charging Mode Configuration
    • 8.2.1 Battery Charging Only (no BFET)
    • 8.2.2 NVDC Charging (with BFET)
  • 8.3 Programming Charger Option
  • 8.4 Autonomous Charging Mode
  • 8.5 Battery Ship Mode
  • 8.6 Diode Emulation Operation
  • 8.7 Battery Learn Mode
  • 8.8 Charger Timeout
  • 8.9 Monitoring
    • 8.9.1 Current Monitor
    • 8.9.2 PSYS Monitor
    • 8.9.3 PROCHOT#
  • 8.10 Stand-Alone Comparator
  • 8.11 Protections[1]
    • 8.11.1 Adapter Overvoltage Protection
    • 8.11.2 System Overvoltage Protection
    • 8.11.3 System Voltage Rail Short Protection
    • 8.11.4 System Voltage Undervoltage Protection (for Short-Circuit Protection)
    • 8.11.5 Over-Temperature Protection
  • 8.12 Selecting the Power Source
• 9. General Application Information
  • 9.1 Selecting the LC Output Filter
  • 9.2 Selecting the Input Capacitor
  • 9.3 Selecting the Switching Power MOSFET
  • 9.4 Selecting the Bootstrap Capacitor
  • 9.5 Switching Power MOSFET Gate Capacitance
  • 9.6 DCIN Filter
  • 9.7 Adapter Input Filter
• 10. Layout
• 11. Package Outline Drawing
• 12. Ordering Information
• 13. Revision History
• A. ECAD Design Information
  • A.1 Part Number Indexing
  • A.2 Symbol Pin Information
    • A.2.1 32-TQFN
  • A.3 Symbol Parameters
  • A.4 Footprint Design Information
    • A.4.1 32-TQFN

Figure index

All 49 numbered figures, plus four drawings the datasheet prints with no number and no caption.

Figure	Image
Figure 1. Full-Featured Architecture Solutions Enabled by RAA489118	00-features-applications/figure-01.png
Figure 2. Typical Application Circuit #1 (Battery Charging Only with No BFET)	01-overview/figure-02.png
Figure 3. Typical Application Circuit #2 (NVDC Charging with a BFET)	01-overview/figure-03.png
Figure 4. Block Diagram	01-overview/figure-04.png
Figure 5. Pin Assignments – Top View	02-pin-information/figure-05.png
Figure 6. Gate Driver Timing Diagram	03-specifications/figure-06.png
Figure 7. Adapter Insertion, VADP: 0V → 5V, VBAT = 18V, ChargeCurrent = 0.256A	04-typical-performance-graphs/figure-07.png
Figure 8. Adapter Insertion, VADP: 0V → 5V, VBAT = 18V, ChargeCurrent = 0.256A (Figure 7 Zoomed In)	04-typical-performance-graphs/figure-08.png
Figure 9. Adapter Removal, VADP: 28V → 0V, VBAT = 18V, ChargeCurrent = 6A	04-typical-performance-graphs/figure-09.png
Figure 10. Adapter Voltage Ramp Up, Boost → Buck-Boost → Buck Operation Mode Transitions	04-typical-performance-graphs/figure-10.png
Figure 11. Adapter Voltage Ramp Down, Buck → Buck-Boost → Boost Operation Mode Transitions	04-typical-performance-graphs/figure-11.png
Figure 12. Boost Mode: Charge Current Loop to Adapter Current Loop, VADP = 5V, VBAT = 16V, AdapterCurrentLimit = 3A, ChargeCurrent: 0.5A → 1A	04-typical-performance-graphs/figure-12.png
Figure 13. Buck_Boost Mode: Charge Current Loop to Adapter Current Loop, VADP = 20V, VBAT = 19V, AdapterCurrentLimit = 5A, ChargeCurrent: 2A → 6A Buck_Boost_CCM_stretch_period = 2x	04-typical-performance-graphs/figure-13.png
Figure 14. Buck Mode: Charge Current Loop to Adapter Current Loop, VADP = 28V, VBAT = 22V, AdapterCurrentLimit = 5A, ChargeCurrent: 1A → 7A	04-typical-performance-graphs/figure-14.png
Figure 15. Boost Mode: Charge Current Loop to Input Voltage Loop, VADP = 5V, VBAT = 16V, ChargeCurrent: 0.5A → 2A, InputVoltageLimit = 4.096V	04-typical-performance-graphs/figure-15.png
Figure 16. OTG Mode Enable, OTG_Debounce = 150ms, VBAT = 29.4V, VOTG = 20V	04-typical-performance-graphs/figure-16.png
Figure 17. OTG Mode Transients, VBAT = 29.4V, VOTG = 20V, OTG Load: 0.5A ↔ 3A	04-typical-performance-graphs/figure-17.png
Figure 18. Adapter Insertion, VADP: 0V → 5V, VBAT = 18V, ChargeCurrent = 0A	04-typical-performance-graphs/figure-18.png
Figure 19. Adapter Insertion, VADP: 0V → 5V, VBAT = 18V, ChargeCurrent = 0A (Figure 18 Zoomed In)	04-typical-performance-graphs/figure-19.png
Figure 20. Adapter Removal, VADP: 28V → 0V, VBAT = 18V, SystemLoad = 2A	04-typical-performance-graphs/figure-20.png
Figure 21. Adapter Voltage Ramp Up, Boost → Buck-Boost → Buck Operation Mode Transitions	04-typical-performance-graphs/figure-21.png
Figure 22. Adapter Voltage Ramp Down, Buck → Buck-Boost → Boost Operation Mode Transitions	04-typical-performance-graphs/figure-22.png
Figure 23. Boost Mode: Output Voltage Loop ↔ Adapter Current Loop, VADP = 5V, MaxSystemVoltage = 21V, VBAT = 20.5V, AdapterCurrentLimit = 3A, ChargeCurrent = 0A, SystemLoad: 0.2A ↔ 4A	04-typical-performance-graphs/figure-23.png
Figure 24. Boost Mode: Charge Current Loop ↔ Adapter Current Loop, VADP = 5V, MaxSystemVoltage = 21V, VBAT = 16V, AdapterCurrentLimit = 3A, ChargeCurrent = 0.5A, SystemLoad: 0A ↔ 4A	04-typical-performance-graphs/figure-24.png
Figure 25. Buck-Boost Mode: Output Voltage Loop ↔ Adapter Current Loop, VADP = 20V, MaxSystemVoltage = 21V, VBAT = 20.5V, AdapterCurrentLimit = 5A, ChargeCurrent = 0A, SystemLoad: 2A ↔ 8A, Buck_Boost_CCM_stretch_period = 2x	04-typical-performance-graphs/figure-25.png
Figure 26. Buck-Boost Mode: Charge Current Loop ↔ Adapter Current Loop, VADP = 20V, MaxSystemVoltage = 21V, VBAT = 20V, AdapterCurrentLimit = 5A, ChargeCurrent = 1A, SystemLoad: 2A ↔ 8A, Buck_Boost_CCM_stretch_period = 2x	04-typical-performance-graphs/figure-26.png
Figure 27. Buck Mode: Output Voltage Loop ↔ Adapter Current Loop, VADP = 28V, MaxSystemVoltage = 21V, VBAT = 20.5V, AdapterCurrentLimit = 5A, ChargeCurrent = 0A, SystemLoad: 2A ↔ 12A	04-typical-performance-graphs/figure-27.png
Figure 28. Buck Mode: Charge Current Loop ↔ Adapter Current Loop, VADP = 28V, MaxSystemVoltage = 21V, VBAT = 20V, AdapterCurrentLimit = 5A, ChargeCurrent = 1A, SystemLoad: 2A ↔ 12A	04-typical-performance-graphs/figure-28.png
Figure 29. Boost Mode: Output Voltage Loop ↔ Input Voltage Loop, VADP = 5V, MaxSystemVoltage = 21V, VBAT = 20.5V, InputVoltageLimit = 4.096V, ChargeCurrent = 0A, SystemLoad: 0A ↔ 4A	04-typical-performance-graphs/figure-29.png
Figure 30. Boost Mode: Charge Current Loop ↔ Input Voltage Loop, VADP = 5V, MaxSysVoltage = 21V, VBAT = 16V, InputVoltageLimit = 4.096V, ChargeCurrent = 0.5A, SystemLoad: 0A ↔ 4A	04-typical-performance-graphs/figure-30.png
Figure 31. OTG Mode Enable. OTG_Debounce = 150ms, VBAT = 29.4V, VOTG = 20V	04-typical-performance-graphs/figure-31.png
Figure 32. OTG Mode Transients. VBAT = 29.4V, VOTG = 20V, OTG Current = 5A, OTG Load: 0.5A ↔ 3A	04-typical-performance-graphs/figure-32.png
Figure 33. General SMBus	05-general-smbus-architecture/figure-33.png
Figure 34. Data Validity	05-general-smbus-architecture/figure-34.png
Figure 35. Start and Stop Waveforms	05-general-smbus-architecture/figure-35.png
Figure 36. Acknowledge On The SMBus	05-general-smbus-architecture/figure-36.png
Figure 37. SMBus Read and Write Protocol	05-general-smbus-architecture/figure-37.png
Figure 38. Buck-Boost Charger Topology	07-modulator-information/figure-38.png
Figure 39. Operation Mode	07-modulator-information/figure-39.png
Figure 40. Charger Control Loops	07-modulator-information/figure-40.png
Figure 41. Two-Level Adapter Current Limit	07-modulator-information/figure-41.png
Figure 42. R3 Modulator	07-modulator-information/figure-42.png
Figure 43. R3 Modulator Operation Principles In Steady State	07-modulator-information/figure-43.png
Figure 44. R3 Modulator Operation Principles In Dynamic Response	07-modulator-information/figure-44.png
Figure 45. Diode Emulation	07-modulator-information/figure-45.png
Figure 46. Period Stretching	08-application-information/figure-46.png
Figure 47. PSYS Accuracy and Limits	08-application-information/figure-47.png
Figure 48. Normalized RMS Input Current at EFF = 1	09-general-application-information/figure-48.png
Figure 49. Adapter Input R-C Snubber Circuit	09-general-application-information/figure-49.png
(uncaptioned) Battery current sensing trace routing, printed page 65	10-layout/battery-current-sensing-trace-routing.png
(uncaptioned) Adapter current sensing trace routing, printed page 66	10-layout/adapter-current-sensing-trace-routing.png
Footprint dimensions diagram (uncaptioned drawing in the printed "Diagram" cell)	A-ecad-design-information/footprint-dimensions-diagram.png
Recommended land pattern diagram (uncaptioned drawing in the printed "Diagram" cell)	A-ecad-design-information/recommended-land-pattern-diagram.png

Known defects in the source datasheet

Each of these is printed exactly as shown in the PDF and is reproduced verbatim in the transcription. Do not "fix" them — every one was confirmed against the rendered page by an independent audit pass.

Printed page	What the datasheet prints	Why it looks wrong
11–19	... VSYS = VBAT = CSOP = CSON = 8V and 29.4, unless otherwise noted.	The Electrical Specifications conditions line omits the V unit after 29.4. Repeated on every page of the table, while the test-condition cells in the same table do print 29.4V.
27	See Table 1 for register details.	Cross-reference from Section 5 to Table 1, which lives in Section 6. Correct under the datasheet's document-wide table numbering, dangling in a per-chapter split.
28	It responds to the 7-bit address 0b0001001_ as follows:	Trailing underscore where the R/W bit placeholder should be.
28	Read address = 0b00010011 (0X13H) and Write address = 0b00010010 (0X12H)	Capital X in the hex prefix plus a redundant trailing H. These are also 8-bit addresses, one sentence after being called a 7-bit address.
35	Control2 Bit[13] and Control 3 Bit[0] configures ...	Control 3 with a space, inconsistent with Control3 everywhere else; singular verb with a compound subject.
36	Table 5. Control2 Register 0x3DH (Cont.)	Double space before (Cont.); every other continuation caption uses one.
36, 37	Table 6 column header Description with a superscript 7	A footnote marker with no footnote 7 defined anywhere in the chapter.
37	Lead-in reads Control7[7] and Control3[8]; the sub-table headers read Control3 [8] and Control7 [7]	Spaces before the bit brackets in the headers only.
40	Table 8. Control5 Register 0x38H at the top of the page	Continuation caption missing (Cont.), unlike Tables 5, 6 and 7.
42	Program Resister read out	"Resister" for "Resistor".
45	BATGONE must be low to enable OTG mode.	Printed twice in Section 7.2 — once ending the first paragraph and again as a standalone closing paragraph.
45	The OTG Voltage register 0x49h configure the OTG output voltage.	Singular subject with plural verb, and a lowercase h hex suffix that the same section mixes with bare 0x49.
54	... only configured if CONGIG/PSYS pin is pulled low at POR.	CONGIG for CONFIG, in the first occurrence of the Table 16 footnote only; the second occurrence is spelled correctly.
54	MaxVsystemVoltage	Inconsistent casing for MaxSystemVoltage.
55	Using this R1 = 10mΩ and Rs2 = 5mΩ	R1 where Rs1 is meant.
56	... Control0 register Bit[7] as shown Table 3.	Missing "in".
59	When the ADP voltage drops below 32.7V from more than 100µs, it starts to turn on ASGATE and start switching.	"from" for "for", and a number-agreement slip on "start switching".
62	... corresponding to the inductor peak-to peak ripple amplitude ...	Missing hyphen; page 61 spells it peak-to-peak.
63	EQ. 11 prints t_SWON and t_SWOFF; its where: list prints t_SW(ON) and t_SW(OFF)	The same two symbols written two ways on one page.
61–64	Equation numbering starts at (EQ. 2)	There is no (EQ. 1) in Section 9, and nothing appears to be missing.
69 vs 72	Package Code/POD Number versus Package Code/ POD number	Spacing and casing differ between A.1 and A.4.1.
71	-10° C, +100° C, -40° C, +105° C	Space between the degree sign and C.
71	732 KHz	Capital K; should be kHz.
22, 24, 25	Figure 13 says Buck_Boost Mode while Figures 25 and 26 say Buck-Boost Mode; Figure 30 says MaxSysVoltage while Figures 23–29 say MaxSystemVoltage; Figures 16 and 17 use a comma after the title where Figures 31 and 32 use a period	Caption style is inconsistent across the performance-graph chapter.

Transcription notes

• Figure captions are the printed caption text only. No figure is described in prose; the extracted image carries that information.
• Where the printed source merges cells vertically, the value is repeated on every Markdown row, because GFM has no rowspan. Where a table is nested inside a description cell, it is rendered as inline HTML so the outer table stays intact.
• Four drawings carry no printed figure number and no caption (printed pages 65, 66, and two on page 72). They were cropped by explicit region rather than given invented numbers:

python3 tools/extract-figures.py \
  --region '1:220,255,490,360:battery-current-sensing-trace-routing.png' \
  --region '2:225,412,485,518:adapter-current-sensing-trace-routing.png' \
  REN_RAA489118/10-layout.pdf

python3 tools/extract-figures.py \
  --region '4:385,172,544,465:footprint-dimensions-diagram.png' \
  --region '4:385,533,544,688:recommended-land-pattern-diagram.png' \
  REN_RAA489118/A-ecad-design-information.pdf

• Figures 1 and 38 were re-cropped explicitly as well. A two-column marketing page and a table sitting directly above a drawing both defeat caption-anchored band detection:

python3 tools/extract-figures.py \
  --region '1:40,530,560,666:figure-01.png' \
  REN_RAA489118/00-features-applications.pdf

python3 tools/extract-figures.py \
  --region '1:40,372,560,494:figure-38.png' \
  REN_RAA489118/07-modulator-information.pdf

• Every other figure came from the caption-anchored pass:

python3 tools/extract-figures.py REN_RAA489118/*.pdf