markdowned-datasheets/REN_RAA489400/TOC.md

RAA489400 Datasheet — Table of Contents

Markdown transcription of REN_RAA489400_DST_20240827.pdf (Renesas RAA489400 USB Type-C Port Controller), Rev.1.00, Aug 27 2024, document R16DS0292EU0100.

The datasheet was split into the per-chapter PDFs in this folder; each has a matching .md transcription and, where the chapter contains figures, a folder of extracted PNGs. Page numbers below are the printed datasheet pages, and are mirrored in the transcriptions as <!-- page N --> markers.

Chapters

#	Chapter	Pages	Source PDF	Figures
1	Overview	5–10	pdf	9
2	Pin Information	11–13	pdf	1
3	Specifications	14–19	pdf	—
4	Typical Performance Graphs	20	pdf	2
5	Functional Description	21–30	pdf	1
6	General SMBus/I²C Architecture	31–33	pdf	11
7	Registers	34–78	pdf	—
8	Layout	79	pdf	1
9–11	Package, Ordering, Revision History	80	pdf	—

Sections

• 1. Overview
  • 1.1 Block Diagram
  • 1.2 Typical Application
• 2. Pin Information
  • 2.1 Pin Assignments
  • 2.2 Pin Descriptions
  • 2.3 Unused Pin Termination
• 3. Specifications
  • 3.1 Absolute Maximum Ratings
  • 3.2 Recommended Operating Conditions
  • 3.3 Thermal Specifications
  • 3.4 Electrical Specifications
  • 3.5 SMBus Timing Specification
• 4. Typical Performance Graphs
• 5. Functional Description
  • 5.1 Start-Up
  • 5.2 Programming Resistors
  • 5.3 USB Type-C Port Controller Interface
    • 5.3.1 USB PD BMC PHY
    • 5.3.2 USB Type-C Current Mode
    • 5.3.3 VCONN Mux
    • 5.3.4 Source Path Control
    • 5.3.5 Sink Path Control
    • 5.3.6 Bi-directional VBUS Source and Sink Path Control
    • 5.3.7 VBUS Monitoring and Measurement
    • 5.3.8 Internal Sink Path Discharge
    • 5.3.9 Initial Sink Fast Role Swap
  • 5.4 Protection Features
    • 5.4.1 VBUS Overcurrent Protection
    • 5.4.2 VBUS Overvoltage Protection
    • 5.4.3 VBUS Source Undervoltage Protection
    • 5.4.4 VBUS Source Reverse Voltage Protection
    • 5.4.5 VCONN Overcurrent Protection
    • 5.4.6 VCONN Overvoltage Protection
    • 5.4.7 VCONN Undervoltage Protection
    • 5.4.8 VCONN Over-temperature Protection
    • 5.4.9 VCONN Reverse Voltage Protection
  • 5.5 OCP# Output
  • 5.6 PROCHOT#
  • 5.7 GPIO
    • 5.7.1 Overcurrent Input
  • 5.8 Clock Management
• 6. General SMBus/I²C Architecture
  • 6.1 Data Validity
  • 6.2 START and STOP Conditions
  • 6.3 Acknowledge (ACK)
  • 6.4 Writing Single Byte Registers
  • 6.5 Reading Single Byte Registers
  • 6.6 Writing Two-Byte Registers
  • 6.7 Reading Two-Byte Registers
  • 6.8 Writing the TRANSMIT_BUFFER
  • 6.9 Reading the RECEIVE_BUFFER
  • 6.10 Reading the Alert Response Address
• 7. Registers
  • 7.1 Register Map — full 00h–FFh address map
  • 7.2 Register Descriptions — 63 registers, VENDOR_ID (00h) through TYPE_C_PRAMETER (E2h)
• 8. Layout
• 9. Package Outline Drawing
• 10. Ordering Information
• 11. Revision History

Figures

#	Title	Image	In chapter
1	Block Diagram	png	1.1
2	Typical USB-C Application, TCPC + TCPM, DRP — VBUS SNK up to 48V, SRC up to 5V	png	1.2
3	Typical USB-C Application, Source Only — VBUS SRC up to 5V	png	1.2
4	Typical USB-C Application, Sink Only — VBUS SNK up to 48V	png	1.2
5	Typical USB-C Application, DRP with GPIO Control	png	1.2
6	Typical USB-C Application, Source Only with GPIO Control	png	1.2
7	Typical USB-C Application, Sink Only with GPIO Control	png	1.2
8	USB-C Application, DRP with VSNK_GATE + GPIO Control — SNK/SRC up to 48V	png	1.2
9	USB-C Application, Bi-directional DRP with GPIO Control — SNK/SRC up to 48V	png	1.2
10	Pin Assignments – Top View	png	2.1
11	Startup VSYS33 Powered (2.0ms/Div, 2.0V/Div)	png	4
12	Startup from VBUS	png	4
13	Typical Multiport Sink Only	png	5.3.6
14	General SMBus Architecture	png	6
15	Data Validity	png	6.1
16	Start and Stop Waveforms	png	6.2
17	Acknowledge on the SMBus	png	6.3
18	Writing Single Byte Registers	png	6.4
19	Reading Single Byte Registers	png	6.5
20	Writing Two-Byte Registers	png	6.6
21	Reading Two-Byte Registers	png	6.7
22	Writing the TRANSMIT_BUFFER	png	6.8
23	Reading the RECEIVE_BUFFER	png	6.9
24	Reading the Alert Response Address	png	6.10
—	(untitled current-sensing trace routing drawing)	png	8

The last entry is unnumbered and untitled in the source: it is drawn inside the CSIN/CSIP cell of the layout-guidelines table rather than being a captioned figure, so it has no figure number or caption to quote.

Known issues in the source datasheet

These were transcribed verbatim rather than silently corrected:

• §3.4 — "SRC 5V VBUS Overvoltage Rising Threshold" is printed with unit mV but has values 5.8 / 6.3 / 6.6, which only make sense as volts.
• §7.1 — Table 7 cites "Table 57" for both GPIO_OC_EN (89h) and VBUS_CTRL (90h), and skips Table 59.
• §7.2.6 — the ALERT bit B9 (Fault) description is cut off mid-sentence in the printed page: "A fault has occurred in".
• §7.2.49 — VBUS_CTRL bits 10:8 (N4) show a reset of 0000b for a 3-bit field.
• §7.2.63 — spelled TYPE_C_PRAMETER in the section heading but TYPE_C_PARAMETER in Table 72. Other typos kept as printed: TIME_INTERVALif, POWER_COTNROL, VBUS_PEAK_CURRENTare, SNK_TO_SRC_TIMERON.
• §8 — the NC row lists pins 1, 7, 17, 23, but the same table assigns pin 7 to GPIO2 and pin 23 to VSRC_BOOT.
• §9 — contains no package outline drawing or dimension table; it only points to the end of the full datasheet and the Renesas website.

Transcription notes

• GitHub-flavored Markdown has no rowspan, so vertically merged cells in the source are repeated on each row.
• Tables that break across a page in the source are kept split, with their printed "(Cont.)" captions, so the <!-- page N --> markers stay in order.
• Figures were extracted from the vector PDFs by tools/extract-figures.py; run it inside nix develop.